Date: November 27th, 2012 - December 3rd, 2012
Group Number: May12-28/0 - Simultaneous Co-test of DAC ADC pairs
Group Adviser & Client: Dr. Chen
Accomplishments of Week: The analog filter design was finalized and approved. Work on the layout was started and had good progress. The schematic was also rechecked with a couple changes made. The design document and project plan were updated as well as the end of the semester presentation was created, uploaded, and given on December 3rd.
Plans for Coming Week: We will once again have our weekly meeting with our adviser on Friday. Work on the layout will be emphasized as the deadline will be the end of this semester. Quotes for the board will be worked on. Also, the precision ADC and wave generator will be researched to be added to the schematic. The schematic will continue to be examined for any possible errors.
Pending Issues: Our issues right now are mostly dealing with our pushed timeline and strategies for verifying our design of the schematic and layout.
Individual Contributions:
Ben Magstadt: Worked on the analog filter and checked the schematic for errors.
Luke Goetzke: Worked on the analog filter and simulations.
Tao Chen: Worked on getting the layout in Altium started as well as fixing mistakes of the schematic.
Group Number: May12-28/0 - Simultaneous Co-test of DAC ADC pairs
Group Adviser & Client: Dr. Chen
Accomplishments of Week: The analog filter design was finalized and approved. Work on the layout was started and had good progress. The schematic was also rechecked with a couple changes made. The design document and project plan were updated as well as the end of the semester presentation was created, uploaded, and given on December 3rd.
Plans for Coming Week: We will once again have our weekly meeting with our adviser on Friday. Work on the layout will be emphasized as the deadline will be the end of this semester. Quotes for the board will be worked on. Also, the precision ADC and wave generator will be researched to be added to the schematic. The schematic will continue to be examined for any possible errors.
Pending Issues: Our issues right now are mostly dealing with our pushed timeline and strategies for verifying our design of the schematic and layout.
Individual Contributions:
Ben Magstadt: Worked on the analog filter and checked the schematic for errors.
Luke Goetzke: Worked on the analog filter and simulations.
Tao Chen: Worked on getting the layout in Altium started as well as fixing mistakes of the schematic.