Date: January 15th, 2013 - January 21st, 2013
Group Number: May12-28/0 - Simultaneous Co-test of DAC ADC pairs
Group Adviser & Client: Dr. Chen
Accomplishments of Week: We sought out new methods to complete our design, with a goal of reducing the overall cost from our original design. One investigated method was with the Audio Precision instrumentation in our graduate lab; this method proved difficult due to the lack of software capabilities, lack of documentation, and lack of help from the manufacturer. The method we decided on was to use the Altera Cyclone II DE2 boards; the same that was used in our Digital Logic course labs. These boards include an FPGA (programmed in verilog), 3 on board memories, and 72 GPIO pins. These boards are readily available to us and will not add any additional cost to the project. This method will greatly reduce the test board we have made, in the number of layers and the overall size by roughly a factor of 10.
Plans for Coming Week: Work further on investigating the capability of the DE2 boards, and verify that the method will work. This includes, reading/writing to the memories, and start developing the code to drive the DAC and recieve the ADC digital component.
Pending Issues: Resolving programming methods on the board.
Individual Contributions:
Ben Magstadt: Worked on Audio Precision instrumentation (digital). Worked on DE2 board initial simulation.
Luke Goetzke: Worked on Audio Precision instrumentation (digital). Worked on DE2 board initial simulation.
Tao Chen: Worked primarily on DE2 board and memory research.
Group Number: May12-28/0 - Simultaneous Co-test of DAC ADC pairs
Group Adviser & Client: Dr. Chen
Accomplishments of Week: We sought out new methods to complete our design, with a goal of reducing the overall cost from our original design. One investigated method was with the Audio Precision instrumentation in our graduate lab; this method proved difficult due to the lack of software capabilities, lack of documentation, and lack of help from the manufacturer. The method we decided on was to use the Altera Cyclone II DE2 boards; the same that was used in our Digital Logic course labs. These boards include an FPGA (programmed in verilog), 3 on board memories, and 72 GPIO pins. These boards are readily available to us and will not add any additional cost to the project. This method will greatly reduce the test board we have made, in the number of layers and the overall size by roughly a factor of 10.
Plans for Coming Week: Work further on investigating the capability of the DE2 boards, and verify that the method will work. This includes, reading/writing to the memories, and start developing the code to drive the DAC and recieve the ADC digital component.
Pending Issues: Resolving programming methods on the board.
Individual Contributions:
Ben Magstadt: Worked on Audio Precision instrumentation (digital). Worked on DE2 board initial simulation.
Luke Goetzke: Worked on Audio Precision instrumentation (digital). Worked on DE2 board initial simulation.
Tao Chen: Worked primarily on DE2 board and memory research.