Date: February 26th – April 1st, 2013
Group Number: May12-28/0 - Simultaneous Co-test of DAC ADC pairs
Group Adviser & Client: Dr. Chen
Accomplishments of Weeks: The board was soldered completely. The FPGA code was fixed and working ideally. Initial debug of the board was begun. The first run of the digital from the FPGA was successful. Data was able to be collected and analyzed. A Matlab GUI for the project was started and completed.
Plans for Coming Weeks: The board will be continued to be debugged. Research will go into discovering what is causing added noise and large spurs. The Matlab GUI will be upgraded to include added features.
Pending Issues: The output data is very noisy with unwanted large non-harmonic spurs.
Individual Contributions:
Ben Magstadt: Worked on debugging and testing the board. Also had to make slight modifications to the FPGA code.
Luke Goetzke: Created the Matlab GUI.
Tao Chen: Helped debug the board.
Group Number: May12-28/0 - Simultaneous Co-test of DAC ADC pairs
Group Adviser & Client: Dr. Chen
Accomplishments of Weeks: The board was soldered completely. The FPGA code was fixed and working ideally. Initial debug of the board was begun. The first run of the digital from the FPGA was successful. Data was able to be collected and analyzed. A Matlab GUI for the project was started and completed.
Plans for Coming Weeks: The board will be continued to be debugged. Research will go into discovering what is causing added noise and large spurs. The Matlab GUI will be upgraded to include added features.
Pending Issues: The output data is very noisy with unwanted large non-harmonic spurs.
Individual Contributions:
Ben Magstadt: Worked on debugging and testing the board. Also had to make slight modifications to the FPGA code.
Luke Goetzke: Created the Matlab GUI.
Tao Chen: Helped debug the board.